LNT / ENGINEERING PORTFOLIO
HARDWARE / FIRMWARE / COMPUTER VISION

From schematic
to sensor data.

Projects in STM32 hardware, ESP32 sensor integration, digital design and YOLO computer vision — the foundation for my interest in Edge AI, with clear contributions and supporting evidence.

3.63/4Cumulative GPA
STM32 + ESP32Embedded platforms
2023 — PresentHUFLIT

01Selected projects

CODE & PHYSICAL HARDWARE
Assembled STM32L4P5 MCU board, photographed on a black backgroundACTUAL HARDWARE · STM32L4P501 /
GRADUATION THESIS · TEAM OF 2

A modular, low-power STM32L4 platform

An STM32L4P5 extension with a separate 2-layer power board and 4-layer MCU board, designed from schematic through PCB layout in Altium.

  • Designed both extension boards and carried out physical bring-up; the first fabricated revision operated successfully.
  • Provided SPI, I2C, UART and SWD interfaces, a 1.8 V power domain and controlled sensor power.
  • Documented the hardware with board photographs, layer drawings and STM32L4P5 voltage/current plots.
Altium DesignerSTM32L4P5PCB designLow power
Design & measurement notes

The extension's hardware measurements are separate from my statistical analysis of the team's STM32L432 reference-board dataset. That analysis used permutation tests and Benjamini–Hochberg adjustment; it is not a Buck/LDO benchmark of this extension. The reference dataset remains private.

STM32L4P5 VBUS voltage and current during an approximately 60-second window, labelled 3.6 V

STM32L4P5 measurement example, 3.6 V condition. A waveform observation, not a claim of regulator efficiency or average energy savings.

Greenhouse system reference diagram showing ESP32-S3, environmental, soil and CO2 sensors, relays, pump and fansSYSTEM REFERENCE DIAGRAM02 /
COURSE PROJECT · TEAM OF 3

ESP32-S3 greenhouse sensor integration

Migrated the sensing subsystem of a Raspberry Pi 5-based greenhouse design to ESP32-S3 N16R8, aiming to reduce cost, power consumption and system complexity.

  • Integrated environmental, soil and CO₂ sensing over I2C, UART and RS485 Modbus RTU using existing libraries.
  • Used three sensor tasks and one MQTT task with a shared-data mutex; published JSON telemetry to the application.
  • My focus was sensor acquisition and integration. Teammates handled the application and application-side automation.
ESP32-S3FreeRTOSMQTT / JSONModbus RTU
Implementation & current limitations

The system operated on a physical setup. The published snapshot includes MQTT retries, but has not been re-tested during portfolio preparation. The source diagram uses CO₂ GPIO 15/16 while the code uses 4/5; TLS certificate verification and Wi-Fi recovery also need further work. These limitations are documented in the repository. No measured cost or power savings are claimed.

XSim waveform showing BRAM CPU clock, reset, control state, program counter, instruction and ALU resultXSIM · FUNCTIONAL SIMULATION
DIGITAL DESIGN · TEAM PROJECTFEB 2025 — PRESENT

RV32IM CPU — FPGA Implementation & Verification

Implementation and waveform analysis of a team-developed CPU, comparing nine adder/multiplier configurations in Vivado. My contribution focuses on implementation reports, timing/resource analysis and simulation debugging.

  • Reviewed routed timing and resource reports targeting the Zynq-7000 xc7z030ffg676-1.
  • Inspected BRAM control-state sequencing, program-counter progression and ALU behavior through XSim waveforms.
  • Published selected reports and diagrams as an evidence-only portfolio; team RTL and testbench source remain private.
VivadoXSimTiming analysisRV32IM
Architecture & evidence boundaries
High-level team CPU architecture with synchronous memories and control sequencer

The BRAM core uses a sequencer and iterative division, so it is not uniformly single-cycle. Historical timing and utilization results come from separate runs and were not regenerated for this portfolio. Physical FPGA-board operation, full ISA compliance and power-efficiency rankings are not claimed. The diagrams describe the team's design, not sole authorship.

Team test Precision–Recall curve labelled 0.987 mAP at IoU 0.5
COMPUTER VISION · TEAM COURSE PROJECTMAY — AUG 2026

Vietnamese traffic-sign detection with YOLO26s

Took primary responsibility for finding, analyzing and combining two datasets. Co-developed Python recognition and tested inference with teammate Thanh, using weights trained by another team member.

  • The report records 10,172 images, 17,860 annotated objects and 66 configured classes.
  • Team-reported test mAP@0.5: 0.987 on 1,018 test images. Two classes have no evaluation samples.
  • Evidence-only portfolio: dataset summary and evaluation results, without source, weights or the full report.
PythonOpenCVYOLO26sDataset preparation
Evaluation & deployment limits

Results are reported by the team, not independently rerun. Evaluation represents 64 classes; related video frames across splits remain a possible source of optimistic scores. Test mAP@0.5:0.95 was not retained. Webcam FPS observations are not a standardized benchmark, and Raspberry Pi 5 deployment remains planned. Street photographs are withheld pending image-provenance review.

02Background & toolkit

EDUCATION

HUFLIT

Ho Chi Minh City University of Foreign Languages – Information Technology

Specialization: Integrated Circuit Engineering (Kỹ thuật vi mạch)

2023 — Present · GPA 3.63/4

Relevant coursework

Embedded Systems · Embedded Programming · Microprocessors and Microcontrollers · Digital Logic Design · Internet of Things · Intelligent Systems

Additional training

Unlock the Future of Chip Design - Physical Design

Introductory online mini-course covering the physical design process. Organized by SHTP Training Center and conducted by Tresemi. Certificate of Completion, December 15–19, 2025.

Programming

C · Python · Verilog

Embedded & connectivity

STM32 · ESP32 · FreeRTOS
SPI · I2C · UART · SWD
RS485 / Modbus RTU · MQTT / JSON

Design & development tools

Altium Designer · STM32CubeIDE
Arduino IDE · Vivado · Proteus

Data & computer vision

pandas · NumPy · OpenCV · TensorFlow

THE NEXT STEP

Let's build something useful.

I'm seeking internships in Embedded Systems and Edge AI, where I can contribute to hardware–firmware integration or computer vision applications while learning to deploy and optimize AI models on embedded devices.

Get in touch ↗